The 37h International Symposium on Power Semiconductor Devices and ICs

Date: June 1-5, 2025 _ Venue: Kumamoto-Jo Hall, Kumamoto, Japan
KUMAMON

kumamoto image ISPSD2025

ABSTRACT & BIOGRAPHY

Recent Requirements and Trends on Power IC Technology

Dr. Sang Gi Lee, DB HiTek, South Korea

Abstract:

The power IC market is projected to grow from 2025 to 2028 at a CAGR of 4.1% (Omdia, 2025). As the market expands and product diversity increases, the requirement for the device and process option supported by BCD (Bipolar-CMOS-DMOS) technology is becoming more critical, not only for maintaining cost-competitiveness but also for enhancing functionality. Therefore, competition is intensifying around differentiated device performance, value-added process options, and design-friendly PDK features.
This presentation will discuss power device performance, figures of merit, challenges in process integration, and the new PDK capabilities required by recent BCD technology. First, we will explore the performance requirements of LDMOS, a core component of Power ICs, across different applications, strategies for achieving target performance, key reliability aspects, and evaluations of large-size LDMOS devices comparable to discrete components. Next, we will discuss isolation schemes and special process options, such as HV capacitor, galvanic isolation, and embedded ReRAM. Finally, we will briefly cover the latest PDK features in modeling, ESD solutions, and P-cell.

Dr. Sang Gi Lee

Biography:

Dr. Sang Gi Lee is the Senior Vice President of DB HiTek, a leading global foundry in Korea specializing in analog and mixed-signal technologies. He is currently focusing on advancing the development of SiC, GaN, SJ MOSFET, IGBT, and RF HRS/SOI CMOS technologies at DB HiTek, leveraging his extensive expertise in the power semiconductors. With over 30 years of experience in analog CMOS and high-voltage BCDMOS technology, he has made significant contributions to Korea's semiconductor industry. Dr. Lee holds more than 60 international patents and has published over a dozen papers in prestigious international journals. He was previously a technical committee member for the Korean Conference on Semiconductors (KCS) from 2001 to 2016 and served on the Technical Program Committee (TPC) for ISPSD from 2019 to 2023. Additionally, he has been a committee member for Device Technology at SEMICON Korea since 2002.
Dr. Lee received his B.S. in Physics from Hanyang University in Korea in 1986, followed by M.S. and Ph.D. in Physics in 1989 and 1999, respectively.

IMPORTANT DATES

Submission deadline: February 14, 2025
Author Notification: March 24, 2025
Registration starts: January 2025
February 2025

Sponsored by

IEEJ
The Institute of Electrical
Engineers of Japan

Technically Co-sponsored by

IEEE
EDS
PELS
IAS

This conference is supported by JSPS KAKENHI Grant Number 24HP0701.

Organizer

The Institute of Electrical Engineers of Japan

Secretariat

ISPSD 2025 Secretariat
c/o Convention Linkage, Inc.
2-17 Sakuramachi, Chuo-ku, Kumamoto City 860-0805, JAPAN
Phone: +81-96-288-0882
Fax: +81-96-288-0883
Email: ISPSD2025@c-linkage.co.jp